ZESTRON to Present “Process Considerations for Defluxing Ultra-Fine Pitch Die on CoWs” at IPC APEX 2023

ZESTRON, the leading global provider of high-precision cleaning products, services, and training solutions in the electronics manufacturing and semiconductor industries, is pleased to announce that ZESTRON’s Senior Application Engineer, Ravi Parthasarathy will be presenting, “Process Considerations for Defluxing Ultra-Fine Pitch Die on CoWs”, at IPC APEX 2023 taking place in San Diego, California.

CoW (Chip on Wafer) is the next generation of CoS (Chip on Substrate) that first combines the chips to the interposer, adds wafer-level molding, and finally, they are connected to the flip chip (FC) substrate. This technology makes a better physical structure for accommodating very large die and larger overall interposer dimensions.

A continuation from the technical paper presented at APEX 2022 and titled “Defluxing of Copper Pillar Bumped Flip Chips,” this new study concentrates on cleaning under the next level of ultra-fine pitch CoW devices down to less than 25μm bump pitch and bump counts of more than 150K. This study focuses on the impact of wash temperatures and conveyor belt speed utilizing analytical/functional testing, including Visual Inspection, FTIR with color mapping, and SEM/EDX to assess cleanliness.

To download the APEX 2022 technical paper, “Defluxing of Copper Pillar Bumped Flip Chips” visit the ZESTRON Technical Articles page.