Cadence to Showcase System Design and Verification Solutions at DVCon Europe 2016

Cadence Design Systems, Inc. (NASDAQ: CDNS) plans to showcase its latest tools, methodologies and support for designing and verifying complex silicon, SoCs and systems at DVCon Europe 2016. The conference takes place October 19-20 in Munich, Germany.


Visit Cadence in booth 403 and talk to Cadence® experts focused on verification IP (VIP) and IC/SoC/system design and verification.


For the full agenda and conference registration, go to


WHAT: Join Cadence for the following tutorials and sessions:

  • Tutorial, ISO 26262 – This Changes Everything: Wednesday, October 19, 10:00a.m., Forum 5
  • Tutorial, How Portable Stimulus Addresses Key Verification, Test Reuse and Portability Challenges: Wednesday, October 19, 10:00a.m., Forum 6
  • Tutorial, Model-Driven Approach to Software-Driven Verification: Wednesday, October 19, 2:00p.m., Forum 5
  • Session, Gate-Level Simulation and Mixed-Signal Verification: Thursday, October 20, 10:45a.m., Forum 6


WHEN: October 19-20, 2016



Holiday Inn Munich City Centre

Hochstrasse 3

81669 Munich