Leadership opinion by Doug Dixon
Abstract
The AI server market has moved beyond a semiconductor growth story. Record hyperscaler investment and rapidly increasing accelerator deployments are creating demand across high bandwidth memory, advanced packaging, substrates, printed circuit boards, power electronics, liquid cooling and electronics manufacturing. The greatest opportunities, and the most significant constraints, now reside in the infrastructure surrounding the processor. For the electronics industry, the defining question is no longer whether AI infrastructure will grow, but whether the supply chain can manufacture, power, cool and connect these systems at the required scale.
Leadership opinion by Doug Dixon
Abstract
The AI server market has moved beyond a semiconductor growth story. Record hyperscaler investment and rapidly increasing accelerator deployments are creating demand across high bandwidth memory, advanced packaging, substrates, printed circuit boards, power electronics, liquid cooling and electronics manufacturing. The greatest opportunities, and the most significant constraints, now reside in the infrastructure surrounding the processor. For the electronics industry, the defining question is no longer whether AI infrastructure will grow, but whether the supply chain can manufacture, power, cool and connect these systems at the required scale.
AI server racks in a modern data center.
When people discuss the AI server market, the conversation usually begins with GPUs. That is understandable. Accelerators provide the computational performance that makes generative AI, large language models and increasingly complex inference workloads possible.
However, focusing exclusively on the processor misses the larger market transformation.
AI servers are becoming some of the most complex and valuable electronic systems ever manufactured at scale. Their growth is changing semiconductor demand, packaging architectures, PCB requirements, memory technology, power distribution, thermal management and the structure of the global electronics manufacturing supply chain.
In my view, the next stage of AI infrastructure growth will be determined less by access to individual accelerator chips and more by the industry’s ability to build complete, reliable systems around them.
Capital Investment Is Reaching an Unprecedented Level
The five largest hyperscale infrastructure companies are projected to invest approximately $685 billion in capital expenditures during 2026, an increase of roughly 70% over their combined 2025 spending of approximately $400 billion. Current forecasts place their combined 2027 investment above $850 billion, with some analysts projecting more than $1 trillion.
Not every dollar will go directly into servers, but the direction of the market is clear. AI infrastructure has become a strategic investment priority for the world’s largest technology companies.
Global AI server shipments are forecast to increase from approximately 2.15 million units in 2025 to 2.75 million in 2026, representing year over year unit growth of approximately 28%. Shipments of Nvidia GB300 rack systems are expected to scale into the tens of thousands of units during 2026, with further growth anticipated in 2027 as production transitions from the GB200 platform.
The value per system is also increasing. A GB300 NVL72 rack integrates 72 Blackwell Ultra GPUs, 36 Grace CPUs, 576 HBM3E stacks, NVLink switching, high speed network interfaces and a complete liquid cooling system. Depending on configuration, estimates place the value of each rack between $3 million and $4.5 million.
This is not conventional server growth. It is a rapid expansion in both unit volume and electronic content per system.
The Market Is Larger Than Nvidia
Nvidia remains the dominant supplier of AI accelerators, but hyperscaler designed silicon is creating an additional growth wave.
Google continues to expand its TPU platform. Amazon Web Services is ramping Trainium. Meta is developing successive generations of its MTIA accelerator, while Microsoft is advancing its Maia architecture.
These custom accelerators may affect the competitive balance between processor suppliers, but they do not change the fundamental manufacturing requirements. Each platform still requires advanced packaging, high bandwidth memory, high performance substrates, complex PCBs, power conversion, high speed interconnects and sophisticated thermal management.
The processor mix will continue to evolve. The physical infrastructure required to support AI compute will remain essential regardless of which accelerator architecture gains market share.
For electronics manufacturers and suppliers, that distinction matters. The opportunity is not limited to companies directly connected to a single GPU platform. It extends across the full AI infrastructure ecosystem.
HBM Is Becoming One of the Market’s Most Strategic Components
A pick and place machine transfers die from wafer to substrate in an advanced packaging line.
High bandwidth memory is central to AI system performance. Training and inference workloads require enormous quantities of data to move between memory and the processor with minimal latency and high energy efficiency.
Global HBM revenue is estimated to have increased from approximately $18 billion in 2024 to $38 billion in 2025. It is projected to reach approximately $58 billion in 2026 and $90 billion in 2027.
In leading AI racks, the HBM subsystem can represent roughly a third of the bill of materials, and close to half of the component cost of an individual accelerator module. This changes memory from a supporting component into one of the system’s largest sources of value and one of its most important supply constraints.
The transition from HBM3E to HBM4, followed by HBM4E and HBM5, will increase bandwidth and memory capacity, but it will also intensify manufacturing challenges. Taller stacks, finer interconnects and higher power density will place additional pressure on bonding, warpage control, yield and thermal performance.
Thermocompression bonding and molded underfill processes remain important for current HBM4 production. Hybrid bonding is expected to become increasingly necessary as stack counts rise, with adoption currently targeted at 16-high HBM4E and HBM5 rather than current HBM4 production.
The question is not whether packaging technology will become more advanced. It is how quickly suppliers can achieve acceptable yields at production volumes.
Advanced Packaging Is Now a Capacity Decision
The industry has spent decades measuring semiconductor progress through transistor density. AI infrastructure is forcing us to look at system density instead.
Producing more accelerator wafers does not automatically produce more AI servers. Those devices must be combined with HBM, interposers, substrates and high density interconnects. They must then be assembled, tested, cooled and integrated into rack scale systems.
This makes advanced packaging capacity a strategic planning consideration comparable to wafer capacity.
Chiplets, 2.5D integration, 3D stacking, thermocompression bonding and hybrid bonding are no longer isolated technology roadmaps. They are directly tied to how much AI compute the industry can deploy.
This is also moving more design decisions upstream. Package, substrate, board, power and cooling teams must work together earlier because decisions in one area affect the performance and manufacturability of the entire system.
The AI server market is reinforcing something our industry already knows: optimizing individual components does not necessarily produce an optimized system.
Power and Cooling Are Becoming First Order Design Constraints
Direct to chip liquid cooling with supply and return coolant lines inside a server rack.
The electrical and thermal demands of AI racks are fundamentally different from those of conventional servers.
Leading accelerators can dissipate up to approximately 1,400 watts per GPU. When dozens of these devices are integrated into a rack, the result is a system requiring extraordinary levels of power delivery and heat removal.
Air cooling alone is no longer sufficient for many high density configurations. Direct to chip liquid cooling, cold plates, manifolds, coolant distribution units and facility water systems are becoming part of the server architecture.
At the same time, higher rack power is creating new requirements for power conversion, busbars, connectors, circuit protection and energy storage. Reducing power loss at every stage, from the facility input to the processor package, has become both an engineering and an economic necessity.
This creates opportunities far beyond the processor market. Suppliers of wide bandgap semiconductors, thermal interface materials, insulated metal substrates, power protection devices, connectors and liquid cooling systems are becoming increasingly important to AI infrastructure deployment.
Power and cooling are no longer secondary design considerations. They are among the primary factors determining how much compute can be installed within a given facility.
PCB and Assembly Requirements Are Also Changing
AI server boards are not simply larger versions of conventional server PCBs. They require higher layer counts, lower loss materials, tighter impedance control, greater interconnect density and more demanding thermal performance.
Higher data rates increase sensitivity to conductor geometry, copper roughness, dielectric consistency, via structures and material selection. Increasing package density places additional pressure on breakout routing, registration, lamination and drilling capability.
These systems also present significant assembly challenges. Large packages, substantial copper content and uneven thermal mass complicate solder paste printing, reflow profiling, warpage management and inspection. As component density increases, process windows narrow and defects become more difficult to detect and rework.
For PCB fabricators and electronics manufacturing services providers, the AI server opportunity will depend on more than available capacity. It will depend on repeatable process capability, material knowledge and the ability to demonstrate reliability at volume.
Being able to manufacture a prototype is not the same as being able to build thousands of identical systems every month.
The Manufacturing Ramp Is Already Visible
The growth of AI server manufacturing is reflected in the results of major electronics manufacturers.
During the first quarter of 2026, Foxconn reported revenue growth of approximately 29.7% year over year. Quanta increased revenue by 66.6%, Wistron by 144% and Inventec by 27.6%. Celestica reported overall growth of 53%, while its Connectivity and Cloud Solutions segment increased 76%.
These numbers indicate that AI infrastructure investment is moving beyond announcements, forecasts and semiconductor purchase commitments. It is translating into server, rack and data center hardware production.
That is an important market signal for the broader electronics industry. Growth is already moving downstream into manufacturing, materials, interconnects, cooling and power systems.
The Next AI Bottleneck Will Be a System Bottleneck
The AI server market is often described as a race for computational performance. I believe it is increasingly becoming a race to remove physical infrastructure constraints.
The next limitation may be HBM supply, advanced packaging capacity, high performance substrates, PCB fabrication capability, power availability, liquid cooling deployment or final system integration. In practice, it will likely be a combination of all of them.
The companies best positioned for this cycle will understand where their technology fits within the complete system. They will work across traditional engineering boundaries and address manufacturability, scalability and reliability as part of the initial design process.
AI servers represent one of the largest growth opportunities the electronics industry has seen in decades. But capturing that opportunity will require more than producing faster processors.
The industry must package them, power them, cool them, connect them and manufacture them at a scale that has never previously been required.
That is where the next phase of AI infrastructure competition will be won.
About the author
Doug Dixon is CEO and founder of 360 BC Group, Inc., a technical marketing agency focused exclusively on the semiconductor, advanced packaging, PCB fabrication and electronics assembly industries. He has more than 40 years of electronics industry experience and serves on the boards of directors for the Printed Circuit Engineering Association and Surface Mount Technology Association. Through 360 BC Group, Doug and his team develop technical papers, market research and content strategies for electronics companies worldwide.
AI server racks in a modern data center.
When people discuss the AI server market, the conversation usually begins with GPUs. That is understandable. Accelerators provide the computational performance that makes generative AI, large language models and increasingly complex inference workloads possible.
However, focusing exclusively on the processor misses the larger market transformation.
AI servers are becoming some of the most complex and valuable electronic systems ever manufactured at scale. Their growth is changing semiconductor demand, packaging architectures, PCB requirements, memory technology, power distribution, thermal management and the structure of the global electronics manufacturing supply chain.
In my view, the next stage of AI infrastructure growth will be determined less by access to individual accelerator chips and more by the industry’s ability to build complete, reliable systems around them.
Capital Investment Is Reaching an Unprecedented Level
The five largest hyperscale infrastructure companies are projected to invest approximately $685 billion in capital expenditures during 2026, an increase of roughly 70% over their combined 2025 spending of approximately $400 billion. Current forecasts place their combined 2027 investment above $850 billion, with some analysts projecting more than $1 trillion.
Not every dollar will go directly into servers, but the direction of the market is clear. AI infrastructure has become a strategic investment priority for the world’s largest technology companies.
Global AI server shipments are forecast to increase from approximately 2.15 million units in 2025 to 2.75 million in 2026, representing year over year unit growth of approximately 28%. Shipments of Nvidia GB300 rack systems are expected to scale into the tens of thousands of units during 2026, with further growth anticipated in 2027 as production transitions from the GB200 platform.
The value per system is also increasing. A GB300 NVL72 rack integrates 72 Blackwell Ultra GPUs, 36 Grace CPUs, 576 HBM3E stacks, NVLink switching, high speed network interfaces and a complete liquid cooling system. Depending on configuration, estimates place the value of each rack between $3 million and $4.5 million.
This is not conventional server growth. It is a rapid expansion in both unit volume and electronic content per system.
The Market Is Larger Than Nvidia
Nvidia remains the dominant supplier of AI accelerators, but hyperscaler designed silicon is creating an additional growth wave.
Google continues to expand its TPU platform. Amazon Web Services is ramping Trainium. Meta is developing successive generations of its MTIA accelerator, while Microsoft is advancing its Maia architecture.
These custom accelerators may affect the competitive balance between processor suppliers, but they do not change the fundamental manufacturing requirements. Each platform still requires advanced packaging, high bandwidth memory, high performance substrates, complex PCBs, power conversion, high speed interconnects and sophisticated thermal management.
The processor mix will continue to evolve. The physical infrastructure required to support AI compute will remain essential regardless of which accelerator architecture gains market share.
For electronics manufacturers and suppliers, that distinction matters. The opportunity is not limited to companies directly connected to a single GPU platform. It extends across the full AI infrastructure ecosystem.
HBM Is Becoming One of the Market’s Most Strategic Components
A pick and place machine transfers die from wafer to substrate in an advanced packaging line.
High bandwidth memory is central to AI system performance. Training and inference workloads require enormous quantities of data to move between memory and the processor with minimal latency and high energy efficiency.
Global HBM revenue is estimated to have increased from approximately $18 billion in 2024 to $38 billion in 2025. It is projected to reach approximately $58 billion in 2026 and $90 billion in 2027.
In leading AI racks, the HBM subsystem can represent roughly a third of the bill of materials, and close to half of the component cost of an individual accelerator module. This changes memory from a supporting component into one of the system’s largest sources of value and one of its most important supply constraints.
The transition from HBM3E to HBM4, followed by HBM4E and HBM5, will increase bandwidth and memory capacity, but it will also intensify manufacturing challenges. Taller stacks, finer interconnects and higher power density will place additional pressure on bonding, warpage control, yield and thermal performance.
Thermocompression bonding and molded underfill processes remain important for current HBM4 production. Hybrid bonding is expected to become increasingly necessary as stack counts rise, with adoption currently targeted at 16-high HBM4E and HBM5 rather than current HBM4 production.
The question is not whether packaging technology will become more advanced. It is how quickly suppliers can achieve acceptable yields at production volumes.
Advanced Packaging Is Now a Capacity Decision
The industry has spent decades measuring semiconductor progress through transistor density. AI infrastructure is forcing us to look at system density instead.
Producing more accelerator wafers does not automatically produce more AI servers. Those devices must be combined with HBM, interposers, substrates and high density interconnects. They must then be assembled, tested, cooled and integrated into rack scale systems.
This makes advanced packaging capacity a strategic planning consideration comparable to wafer capacity.
Chiplets, 2.5D integration, 3D stacking, thermocompression bonding and hybrid bonding are no longer isolated technology roadmaps. They are directly tied to how much AI compute the industry can deploy.
This is also moving more design decisions upstream. Package, substrate, board, power and cooling teams must work together earlier because decisions in one area affect the performance and manufacturability of the entire system.
The AI server market is reinforcing something our industry already knows: optimizing individual components does not necessarily produce an optimized system.
Power and Cooling Are Becoming First Order Design Constraints
Direct to chip liquid cooling with supply and return coolant lines inside a server rack.
The electrical and thermal demands of AI racks are fundamentally different from those of conventional servers.
Leading accelerators can dissipate up to approximately 1,400 watts per GPU. When dozens of these devices are integrated into a rack, the result is a system requiring extraordinary levels of power delivery and heat removal.
Air cooling alone is no longer sufficient for many high density configurations. Direct to chip liquid cooling, cold plates, manifolds, coolant distribution units and facility water systems are becoming part of the server architecture.
At the same time, higher rack power is creating new requirements for power conversion, busbars, connectors, circuit protection and energy storage. Reducing power loss at every stage, from the facility input to the processor package, has become both an engineering and an economic necessity.
This creates opportunities far beyond the processor market. Suppliers of wide bandgap semiconductors, thermal interface materials, insulated metal substrates, power protection devices, connectors and liquid cooling systems are becoming increasingly important to AI infrastructure deployment.
Power and cooling are no longer secondary design considerations. They are among the primary factors determining how much compute can be installed within a given facility.
PCB and Assembly Requirements Are Also Changing
AI server boards are not simply larger versions of conventional server PCBs. They require higher layer counts, lower loss materials, tighter impedance control, greater interconnect density and more demanding thermal performance.
Higher data rates increase sensitivity to conductor geometry, copper roughness, dielectric consistency, via structures and material selection. Increasing package density places additional pressure on breakout routing, registration, lamination and drilling capability.
These systems also present significant assembly challenges. Large packages, substantial copper content and uneven thermal mass complicate solder paste printing, reflow profiling, warpage management and inspection. As component density increases, process windows narrow and defects become more difficult to detect and rework.
For PCB fabricators and electronics manufacturing services providers, the AI server opportunity will depend on more than available capacity. It will depend on repeatable process capability, material knowledge and the ability to demonstrate reliability at volume.
Being able to manufacture a prototype is not the same as being able to build thousands of identical systems every month.
The Manufacturing Ramp Is Already Visible
The growth of AI server manufacturing is reflected in the results of major electronics manufacturers.
During the first quarter of 2026, Foxconn reported revenue growth of approximately 29.7% year over year. Quanta increased revenue by 66.6%, Wistron by 144% and Inventec by 27.6%. Celestica reported overall growth of 53%, while its Connectivity and Cloud Solutions segment increased 76%.
These numbers indicate that AI infrastructure investment is moving beyond announcements, forecasts and semiconductor purchase commitments. It is translating into server, rack and data center hardware production.
That is an important market signal for the broader electronics industry. Growth is already moving downstream into manufacturing, materials, interconnects, cooling and power systems.
The Next AI Bottleneck Will Be a System Bottleneck
The AI server market is often described as a race for computational performance. I believe it is increasingly becoming a race to remove physical infrastructure constraints.
The next limitation may be HBM supply, advanced packaging capacity, high performance substrates, PCB fabrication capability, power availability, liquid cooling deployment or final system integration. In practice, it will likely be a combination of all of them.
The companies best positioned for this cycle will understand where their technology fits within the complete system. They will work across traditional engineering boundaries and address manufacturability, scalability and reliability as part of the initial design process.
AI servers represent one of the largest growth opportunities the electronics industry has seen in decades. But capturing that opportunity will require more than producing faster processors.
The industry must package them, power them, cool them, connect them and manufacture them at a scale that has never previously been required.
That is where the next phase of AI infrastructure competition will be won.
About the author
Doug Dixon is CEO and founder of 360 BC Group, Inc., a technical marketing agency focused exclusively on the semiconductor, advanced packaging, PCB fabrication and electronics assembly industries. He has more than 40 years of electronics industry experience and serves on the boards of directors for the Printed Circuit Engineering Association and Surface Mount Technology Association. Through 360 BC Group, Doug and his team develop technical papers, market research and content strategies for electronics companies worldwide.